CD4044BE CMOS Quad NAND R/S Latch with 3-State Outputs, Q: 15

Description

Features for the CD4044B
3-state outputs with common output ENABLE
Separate SET and RESET inputs for each latch
NOR and NAND configurations
5-V, 10-V, and 15-V parametric ratings
Standardized symmetrical output characteristics
100% tested for quiescent current at 20 V
Maximum input current of 1 µA at 18 V over full package temperature range; 100 nA at 18 V and 25°C
Noise margin (over full package temperature range):
1 V at V
DD
= 5 V
2 V at V
DD
= 10 V
2.5 V at V
DD
= 15 V
Meets all requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of 'B' Series CMOS Devices"
Applications
Holding register in multi-register system
Four bits of independent storage with output ENABLE
Strobed register
General digital logic